CMOS logic gate circuits are made in CMOS technology. CMOS is abbreviation of Complementary MOS. MOS is abbreviation of Metal-Oxide-Semiconductor. Basic circuit of CMOS logic is CMOS inverter given in figure bellow.

N channel and P channel MOSFET that CMOS inverter consists of, have input characteristics given in figure bellow. In here, V_{TN} is threshold voltage of N channel MOSFET, and V_{TP} is threshold voltage of P channel MOSFET.

MOSFET operates in saturation (equivalent to active regime for bipolar transistor) when

For N channel MOSFET in CMOS inverter, conditions for saturation are

and

P channel MOSFET in CMOS inverter is saturated when

and

Transfer characteristic of CMOS inverter has five segments:

- N channel MOSFET cutt-off and P channel MOSFET ohmic
- N channel MOSFET saturated and P channel MOSFET ohmic
- N channel MOSFET saturated and P channel MOSFET saturated
- N channel MOSFET ohmic and P channel MOSFET saturated
- N channel MOSFET ohmic and P channel MOSFET cutt-off

Whole transfer characteristic of CMOS inverter gate is given in figure bellow.

CMOS Three state inverter is given in figure bellow

If input denoted as “H” is with low logic value, Q_{1} and Q_{4} are cutt-off and output is with high impedance. If “H” is with high logic value, Q_{1} and Q_{4} are ohmic and circuit above behave as regular CMOS logic inverter gate.

Logic NAND circuit in CMOS technology is given in figure bellow.

Logic NAND circuit in CMOS technology has following combinations in input and output stages:

- A=0, B=0, Q
_{1}and Q_{2}cutt-off. Q_{3}, Q_{4}ohmic V_{OUT}=V_{CC} - A=0, B=1, Q
_{1}and Q_{3}cutt-off. Q_{2}, Q_{4}ohmic V_{OUT}=V_{CC} - A=1, B=0, Q
_{2}and Q_{4}cutt-off. Q_{1}, Q_{3}ohmic V_{OUT}=V_{CC} - A=1, B=1, Q
_{3}and Q_{4}cutt-off. Q_{1}, Q_{2}ohmic V_{OUT}=0

Logic NOR circuit in CMOS technology is given in figure bellow.

Logic NOR circuit in CMOS technology has following combinations in input and output stages:

- A=0, B=0, Q
_{1}and Q_{2}cutt-off. Q_{3}, Q_{4}ohmic V_{OUT}=V_{CC} - A=0, B=1, Q
_{1}and Q_{3}cutt-off. Q_{2}, Q_{4}ohmic V_{OUT}=0 - A=1, B=0, Q
_{2}and Q_{4}cutt-off. Q_{1}, Q_{3}ohmic V_{OUT}=0 - A=1, B=1, Q
_{3}and Q_{4}cutt-off. Q_{1}, Q_{2}ohmic V_{OUT}=0

**External links:**

CMOS logic on Wikipedia

CMOS logic on Iroi.seu.edu.cn

CMOS logic on Allaboutcircuits

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