Go to Differential Amplifier Simulation

Purpose of differential amplifier is to generate output signal that is proportional to input signals difference. Block scheme of an general differential amplifier is given in figure bellow.

Desired output voltage is proportional (or equal) to voltage difference:

However, in practice, there is always some side effects and imperfectness, so

Output voltage of an differential amplifier suppose to be free from averaged voltage

Assuming that differential amplifier is linear circuit, we can do further analyses by using superposition theorem. Output voltage can be marked as:

In here, A_{A} is voltage gain of input signal V_{A}

and A_{B} is voltage gain of input signal V_{B}

Output voltage of differential amplifier can be expressed with averaged voltage V_{M} and differential voltage V_{D}.

With the output voltage expressed over averaged and differential voltage, and separating gains, we obtain

i.e.

In here, A_{M} is averaged signal gain defined as

and A_{D} is differential signal gain defined as

For ideal differential amplifier, it must be obtained that V_{A}=-V_{B}. Measure for imperfection of an differential amplifier is Common Mode Rejection parameter CMRR defined as

Differential amplifier is an input stage of every operational amplifier. In a case of ideal differential amplifier, CMRR would be infinite, since A_{M} would be zero. In real operational amplifiers, CMRR is larger then 1000000. Depending on technology how op-amp is integrated, input differential amplifier can be realized with BJT transistors, JFET transistors or MOSFET transistors. BJT transistor differential amplifier is given in figure bellow.

In the upper scheme, Q_{0} is the current source. Differential gain A_{D} for BJT transistor differential amplifier is

In here, R_{C1}=R_{C2}=R_{C}, V_{T} is threshold voltage, I_{0} is current of the current source Q_{0} (collector current of Q_{0}). Parameters h_{FE} and h_{11} are Q_{1} i.e Q_{2} transistors current gain, and base resistance, respectively. BJT transistor differential amplifier can be improved if collectors resistors are replaced with active load (current mirror). Scheme of BJT transistor differential amplifier with current mirror is given bellow.

Differential gain of BJT transistor differential amplifier with current mirror is

BJT transistor differential amplifier has it’s limitations. Voltage difference V_{A}-V_{B} must not be lower then -3V_{T} or higher then +3V_{T}, otherwise, differential amplifier will be saturated. Take a look at transfer characteristic.

JFET transistor based differential amplifier is very similar, and it’s given in figure bellow.

Generally, if input stage of an operational amplifier is realized as BJT transistor differential amplifier, op-amp has smaller slew rate, smaller voltage offset and better CMRR. If it’s realized as JFET transistor based differential amplifier, voltage offset is higher, CMRR is smaller but slew rate is better.

**External links:**

Differential Amplifier on Ecircuitcenter

Differential Amplifier on Wikipedia

Differential Amplifier on Circuitstoday

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